发明名称 PACKET EXCHANGE INTERFACE CIRCUIT
摘要 PURPOSE:To transmit low-speed data while converting them to middle and high-speed data by executing control at the time of transmission/reception so that the stored data of respective corresponding buffer means can be held at the fixed amount. CONSTITUTION:In the case of data transmission, the output of an unused area detecting means 11 is compared with the number of reference packets and corresponding to the result of the comparison, a first buffer means 16 is controlled so that the first buffer means 16 can be read or the read can be temporarily stopped. Then, stored data of the first storing means 16 are held at the fixed amount. In the case of reception, the output of a packet data detecting and separating means 21 is compared with the number of packets and according to the compared result, a second buffer means 25 is controlled so that the second buffer means 25 can be read or the read can be stopped. Then, the stored data to the second buffer means 25 are held at the fixed amount.
申请公布号 JPH03201843(A) 申请公布日期 1991.09.03
申请号 JP19890344433 申请日期 1989.12.28
申请人 FUJITSU LTD 发明人 SAKATA TATSUMI
分类号 H04L12/20;H04L12/56 主分类号 H04L12/20
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