| 摘要 |
PURPOSE:To enhance the writing-in characteristics by a method wherein an insulating region is provided in an emitter of a horizontal type bi-polar transistor to be manufactured between the emitter sidewall and the electrode opposite to a collector region while notably changing emitter resistance by emitter current. CONSTITUTION:Within the title semiconductor memory, an N<+> layer 2 is buried in an N epitaxial layer 3 on a P<->Si substrate 1; P<-> layers 4a, 4b are provided on the surface while N<+> layers 5, 6 are provided in the P<-> layer 4a; two each of inverters comprising an NPN vertical type driving transistor Q3 and a horizontal type PNP loaded transistor Q1 in series of the P<-> layer 4b, N<-> layer 3, P<-> layer 4a are provided; while base collectors of a pair of Q3 are cross-connected. An SiO2 region 10 is formed near the surface of an emitter 8 of Q1, an emitter electrode E1 is provided on the farther side of the region 10 from the P<-> collector 4a. In the low current region of the collector current of Q1, hole is implanted from the whole left side region from the center of the emitter layer 8 to increase the current amplification factor betaA. On the contrary, in the high current region, only the left half of the layer 8 can fill the role of the emitter so that the current amplification factor betaB discharged from the part beneath the layer 8 may be decreased to cut down betaB/betaA thereby enabling the writing-in performance of a pnp load type memory cell to be notably enhanced. |
