| 摘要 |
<p>PURPOSE:To suppress the position deviation of a picture to a minimum by providing a gate element which outputs a first clock as the sampling clock of an NTSC composite video signal when it is the one in which first and second clocks are equal, and outputs a second clock as the sampling clock when the first clock is not equal to the second clock. CONSTITUTION:The gate element 16 is the one to control the passage and the block of the clock with frequency 2kfsc outputted from a VCO 9, and when the frequency of the clock with frequency of integer times the chrominance subcarrier frequency fsc is equal (video signal input which satisfies relation fsc=455/2fM) to that of the clock with frequency of integer times the horizontal scanning frequency fM, and the condition of the frequency of a required sampling clock is the frequency of integer times the chrominance subcarrier frequency, the clock with frequency 2kfsc is passed, and in the case other than that, the clock with frequency 2kfsc is blocked. A circuit is comprised in such a way that the current of the clock passing the gate element 16 is limited with a resistor 17, and also, only an AC component is mixed in a VCO 14 with a capacitor 18.</p> |
