发明名称 WAIT FUNCTION TEST CIRCUIT FOR ICE
摘要 PURPOSE:To freely change the wait time and to improve the working efficiency by using a higher rank bit of an address bus outputted from an in-circuit emulator ICE as the set value of the wait number and changing the address to receive an access when a memory receives an access from the ICE. CONSTITUTION:When an ICE 1 has an access to a memory 4, the address information on the memory 4 is put on an address bus. The memory 4 gives an access to the data on the address corresponding to a lower rank address signal connected to an address input terminal out of the address information on the memory 4. At the same time, the memory 4 sends data to a data bus 14 in accordance with a control signal 11 and writes the data taken out of the bus 14 into a data area. On the other hand, a wait inserting part 5 outputs a data acknowledge signal 15 after a time equivalent to the weight number decided by the higher rank address information since a higher rank address signal 13 of the address bus is connected to a wait number setting terminal of the part 5.
申请公布号 JPH03171334(A) 申请公布日期 1991.07.24
申请号 JP19890311633 申请日期 1989.11.30
申请人 ANDO ELECTRIC CO LTD 发明人 SUGIMORI MASAYASU;MUKUMOTO KOJI
分类号 G06F11/22 主分类号 G06F11/22
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