发明名称 FAULT PROCESSING METHOD OF DATA PROCESSING DEVICE
摘要 PURPOSE:To minimize a down time of a system by the first and second processors, also to easily analyze the cause of an accident, and to quickly restart an operation of the system, by providing a fault detecting circuit, and the first and second processors. CONSTITUTION:A fault detecting circuit 1, the first processor 21 for executing a regular processing operation, and the second processor 22 for analyzing an abnormal operation are provided on a data processing system. This circuit 1 and both the processors 21, 22 are connected to a memory 3 and an interruption controlling circuit 4 through a system bus line BL1, respectively. When a fault has been detected by the detecting ciruit 1, its own storage contents are stored in a prescribed area of the memory 3 by the processor 21, and after that, immediately or after a constant interval of time has passed, the operation is restarted. Also, the contents of the memory 3, which are required for analyzing a fault are transferred to an area of its own memory by the processor 22, and also the operation of the system is restarted to its normal state quickly by analyzing the fault.
申请公布号 JPS57105049(A) 申请公布日期 1982.06.30
申请号 JP19800182339 申请日期 1980.12.23
申请人 TOKYO SHIBAURA DENKI KK 发明人 TANAKA NOBUHIRO
分类号 G06F11/34;G06F11/07 主分类号 G06F11/34
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