发明名称 DIVIDER CIRCUIT
摘要 PURPOSE:To form the divider circuit of high accuracy and a high speed by dividing a dividend into two high order and low order groups, storing the respective division results as a high order division table and a low order division table, and adding the high order division result and the low order division result. CONSTITUTION:The circuit is provided with a high order division table 5 in which a result of division of a prescribed upper bit is stored, a high order division table reference circuit 6 for referring to the high order division table 5 corresponding to a value of the upper bit of a dividend and a divisor, and a low order division table 7 in which a result of division of a prescribed lower bit is stored. Also, this circuit is provided with a low order division table reference circuit 8 for referring to the low order division table 7 corresponding to a value of the lower bit of the dividend and the divisor, and an adder circuit for adding a result of reference of the high order division table reference circuit 6 and a result of reference of the low order division table reference circuit 8. In such a way, the dividing circuit of a high speed and high accuracy can be formed.
申请公布号 JPH03166623(A) 申请公布日期 1991.07.18
申请号 JP19890307032 申请日期 1989.11.27
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SANNOMIYA KUNIO;TSUDA YUKIFUMI;MARUYAMA YUJI;IKETANI KAZUTOSHI
分类号 G06F7/537;G06F7/52;G06F7/535 主分类号 G06F7/537
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