CONVERSION METHOD OF LAYOUT PATTERN INFORMATION OF SEMICONDUCTOR INTEGRATED CIRCUIT,申请号JP19890302418-传众专利搜索

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发明名称	CONVERSION METHOD OF LAYOUT PATTERN INFORMATION OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要
申请公布号	JPH03161953(A)	申请公布日期	1991.07.11
申请号	JP19890302418	申请日期	1989.11.20
申请人	DAINIPPON PRINTING CO LTD	发明人	MURAKAMI TETSUKAZU;FUNATO MIE
分类号	H01L21/82;G06F17/50	主分类号	H01L21/82
代理机构		代理人
主权项
地址

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