| 摘要 |
<p>PURPOSE:To apply time base conversion of a sampling frequency Fs into a digital voice signal by storing once a digital voice signal controlled and sent with an average transmission rate of the digital voice signal to be set Fs into a memory and reading the digital voice signal at the frequency of Fs. CONSTITUTION:A digital voice signal (b) whose average transmission rate is controlled to be Fs is inputted to a memory 101 in the timing of a write clock (c) synchronously with the digital voice signal (b). A phase comparator 107, a low pass filter 108, a VCO 109, a counter 105, a comparator 104 and a delay device 106 constitute a phase locked loop and an output (i) from the delay device 106 is outputted while being delayed at a delay time (t) from the inverting edge of an HSW pulse (a) and a readout clock (n) with Fs=48kHz without jitter is recovered from the VCP 109 so long as the HSW pulse (a) has no deviation from Fv=30/1.001.</p> |
