发明名称 CONTROLLING METHOD FOR CYCLOCONVERTER
摘要 PURPOSE:To positively switch during a gate blocking by gate blocking after a timer responsive to a primary frequency when the polarity of a current reference is switched, and the releasing it. CONSTITUTION:When the polarity of a current reference is switched, a current is further reduced only during the time of a timer to be input from a timer function 51. A thyristor is not again ignited to fail to switch during the gate blocking of a converter 40 before switching in an intermittent state, but the switching is positively realized. When the output frequency is low, the timer is operated long, while when it is high, the timer is operated short. Accordingly, the influence of the dead band necessary for switching is set to be ignored. Thus, no problem occurs in a current waveform and controllability. Since a small slip frequency exists during zero speed, the influence of the timer can be ignored.
申请公布号 JPH03150070(A) 申请公布日期 1991.06.26
申请号 JP19890284868 申请日期 1989.11.02
申请人 TOSHIBA CORP 发明人 TATARA SHINJI
分类号 H02P27/16;H02M5/27 主分类号 H02P27/16
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