发明名称 INTEGRATED CIRCUIT FOR NOISE PREVENTION
摘要 PURPOSE:To prevent an erroneous operation caused by power source noise by the integrated circuit itself and to easily perform a high density mounting and miniaturization of the device by a method wherein a capacitor, to be used for prevention of noise, is sealed in the itegrated circuit. CONSTITUTION:The terminal of a chip capacitor 1 of comperatively large capacity, to be used for prevention of power source noise, is bonded on the power source for the pin, to be used for the bonding of an IC chip 2, and the terminals 3 and 4 corresponding to a ground wire. The above is sealed in the IC together with the IC chip 2 and an IC package is formed. Besides, 5 is used as an outer terminal and the package has sufficient space wherein the chip capacitor will be sealed. Through these procedures, the capacitor used to prevent an erroneous operation is unnecessitated, and the high density mounting and the miniaturization of the device can be accomplished.
申请公布号 JPS57118661(A) 申请公布日期 1982.07.23
申请号 JP19810004388 申请日期 1981.01.14
申请人 FUJITSU KK 发明人 KASHIWADA ITSUSHIYOU;SHIBATA MITSUHIRO
分类号 H01L21/822;H01L23/495;H01L27/04 主分类号 H01L21/822
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