| 摘要 |
<p>PURPOSE:To highly accurately evaluate the characteristics of an A/D conversion circuit part by supplying A/D-converted digital data obtained in each sampling period to a whole bit testing circuit in samples in accordance with a cycle synchronized with a reference clock. CONSTITUTION:A MODEM LSI 1 is provided with a digital signal processing unit 2, an analog circuit part 3 and a testing output circuit 4 and respective elements are formed on a semiconductor substrate. Since a data output cycle from an A/D conversion part 5 synchronizing with an output enable signal DOEN comes to be gradually shifted from the cycle of a reference clock signal CLK, the circuit 4 is allowed to output the converted digital data obtained in each sampling period for an analog test pattern supplied to the A/D conversion part 5 to the outside in each sampling unit in accordance with the cycle synchronizing with the reference clock signal CLK. Consequently, the evaluation of characteristics of the A/D conversion part can be highly accurately attained.</p> |
