| 摘要 |
PURPOSE:To shorten a read time by composing a read system of an N channel MOS transistor(TR). CONSTITUTION:When a write signal W is 1, N channel MOS TRs MN11 and MN14 turn on and write data signal DW and the inverse of DW are inputted to and held in a latch circuit; and they are continuously held when the W is 0. A signal from a latch circuit is inputted to gate terminals of the MNs 16 - 19. When a read signal R is 1, MN15 and MN20 turn on and gate terminals of MN16 and MN19 are held at 1 level; when the gate terminals of MN17 and MN18 are at 0 level, MN16 and MN19 turn on and MN17 and MN18 turn off, so that 1 is outputted as a read data signal DR and 0 is outputted as the inverse of DR. When the gate terminals of the MN16 and MN19 are at the 0 level and the gate terminals of MN17 and MN18 are the 1 level, 0 and 1 are outputted as DR and the inverse of DR. Thus, the falling time of the DR is shortened to shorten the read time. |
