| 摘要 |
PURPOSE:To obtain a digital Gaussian noise signal close to the normal distribution from an M series pseudo random signal by adding an accumulation circuit with simple constitution to an M series pseudo random signal generating circuit. CONSTITUTION:An accumulation circuit 4 adds each digit of a shift register 2 to its counters 5a-5h once at each input of a clock signal. When the inputted number of clock signals reaches a proper 2's power, the value stored in counters 5a-5l of the accumulation circuit 4 is divided by 16 to obtain one sampling average value. Actually, apply of 4-bit shift to the part having an accumulated value less in weight is enough. Every time the clock signal is inputted for 16 times, one sample mean value is calculated and outputted in such a way. When the clock signal is inputted from an M series pseudo random signal generating circuit 1 outputting an N-bit length M series pseudo random signal for 2<15>-1=32767 times, the output of the sample mean value is finished. The result is a digital Gaussian noise signal close to the normal distribution. |
