发明名称 SYNCHRONIZATION DECIDING CIRCUIT
摘要 <p>PURPOSE:To attain synchronization protection at a new phase even when the phase of a synchronous signal is changed by using the output signal of a flip-flop to open a gate circuit, thereby using the synchronous signal as the load signal of a counter and a reset signal of the flip-flop. CONSTITUTION:A decoder 2 adds a set signal to a flip-flop 3 when the content of count of a counter 1 corresponds to a period less by 2-bit than the period of a synchronous signal, the set output of the flip-flop 3 opens a gate circuit 4 and the synchronous signal at the time of input is used as the loading signal of the counter 1 and a reset signal of the flip-flop 3. Then the counter 1 is operated synchronously with the phase of the new synchronous signal. Thus, the synchronization protection by the new phase of the synchronous signal is implemented in the circuit constitution that synchronizing step-out is decided when the carrier signal of the counter 1 is consecutively outputted by a forward protection stage number or above.</p>
申请公布号 JPH03106136(A) 申请公布日期 1991.05.02
申请号 JP19890241841 申请日期 1989.09.20
申请人 FUJITSU LTD 发明人 YAMAGUCHI SEIICHI
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
代理机构 代理人
主权项
地址