发明名称 TIME SIGNAL GENERATING CIRCUIT
摘要 PURPOSE:To enable output of an accurate time signal at all times by conducting modification of a time by using an output of a flip-flop, and by outputting the time signal. CONSTITUTION:A flip-flop (FF) 14 receives an output of a position pulse detecting element 12 as an input at a set terminal S thereof and receives an output of a negative pulse detecting element 13 as an input at a reset terminal R. In the cases of no modification of a time and a time delay, positive and negative pulses are generated alternately, and therefore the output of the positive pulse detecting element 12 and that of the negative pulse detecting element 13 are delivered alternately. Accordingly, setting and resetting are executed alternately in the flip-flop 14, an output thereof is processed by a time signal control element 6, and an accurate time signal is outputted from a time signal generating element 7.
申请公布号 JPH03105280(A) 申请公布日期 1991.05.02
申请号 JP19890244110 申请日期 1989.09.20
申请人 FUJITSU LTD 发明人 KANDA MAKOTO
分类号 G04R60/14;G04C13/03;G04R20/00 主分类号 G04R60/14
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