发明名称 |
MASK ROM |
摘要 |
PURPOSE:To make a parasitic capacitance of a bit line constant by connecting a drain electrode of a field effect type transistor (TR) forming a memory cell array to a bit line and writing information depending whether a source electrode of the TR is connected to a power wiring. CONSTITUTION:Drain electrodes of field effect type TRs Q1100-Q1nm forming a memory cell array 11 are connected to bit lines BL0-BLm and the information is written depending whether or not source electrodes of the TRs Q1100-Q1nm are connected to a power wiring 18. The information is written depending whether or not source electrodes of the TRs Q1100-Q1nm are connected to the power wiring 18, then the number of the memory cell TRs Q1100-Q1nm connecting to the bit lines BL0-BLm is constant independently of the storage content. Thus, the parasitic capacitance of the bit lines is made constant independently of the storage content. |
申请公布号 |
JPH03105798(A) |
申请公布日期 |
1991.05.02 |
申请号 |
JP19890243616 |
申请日期 |
1989.09.20 |
申请人 |
HITACHI LTD;HITACHI VLSI ENG CORP |
发明人 |
SATO YOICHI;SHINAGAWA SATOSHI;MIZUKAMI MASAO |
分类号 |
G11C17/12;G11C17/18;H01L21/8246;H01L27/112 |
主分类号 |
G11C17/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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