| 摘要 |
PURPOSE:To form a vertical MOS structure in a simple manufacturing process and to enable a circuit pattern to be micronized and high in accuracy by a method wherein a work line is formed on the side wall of a protrusion through the intermediary of a gate oxide film, where the protrusion concerned is sandwiched between a bit contact region and a capacitor contact region. CONSTITUTION:As<+> ions are implanted in a self-aligned manner using a side wall layer 6 as a mask to form an N<+>-type capacitor contact region 8a and an N<+>-type bit contact region 8b on the upside of a protrusion 2 and the base of a recess 3 respectively. Furthermore, a work line 10 is formed on the side wall of the protrusion 2 through the intermediary of a gate oxide film 9, where the protrusion is sandwiched between the N<+>-type capacitor contact region 8a and the N<+>-type bit contact region 8b. By this setup, a vertical type MOS transistor can be manufactured in a simple manufacturing process, and the circuit pattern of semiconductor device can be micronized and made high in accuracy. |
