| 摘要 |
PHF. 83 584 10 An arrangement ensuring the change-over of two channels (1, 2) through which the same digital information is conveyed with automatic data alignment over a ? 3.5 bit range comprises for each channel an array of buffer stores operating at a write rate Hi/Ni (where i = 1, 2), an oscillator operating at a rate H which provides reading of the buffer stores at the rate H/N and being synchronized in phase-opposition with one or the other of the write rates, and a logic comparator controlling the write rates Hi/Ni, the routing of the write rates to the input of the oscillator, as well as a change-over switch for the data. In the buffer store of the channel 2 assumed to be the one whose quality degrades, the data are converted into N parallel streams at the rate H2/N and are read at the rate H/N of the oscillator. In the other, higher-quality channel 1 the write rate of the buffer store is forced to the rate H1/N-1, the read rate remaining unchanged, until there is a coincidence of N bits in the two channels; thereupon the data stream is switched, the write rate is locked at H1/N and this write rate is applied to the oscillator. |
