发明名称 PROCESSING SYSTEM FOR ACCURACY CONVERSION INSTRUCTION
摘要 PURPOSE:To reduce the overhead of exponent part conversion processing and to speed up the processing by detecting an exponent overflow, an exponent underflow, and whether a bias adjustment is allowed or not by using the output of an exponent part converting circuit. CONSTITUTION:The exponent part converting circuit 3 inputs the exponent part E of input floating point data 2 and performs specified accuracy conversion to generate an exponent overflow detection signal EXO or exponent underflow detection signal EXU when detecting the overflow or underflow at this time. Further, a state detection signal CC for detecting whether the bias adjustment is allowed or not is outputted with a value based upon k1=E or k2=2, k1<E<k2, or E<k1 or k2<E, where k1 is the lower-limit value of a predetermined bias adjustment permissible limit and k2 is the upper-limit value. A main conversion processing part 4 inputs a mantissa part F to perform the bias adjustment when allowed according to the respective signals EXO, EXU, and CC, and outputs the conversion output 5. Consequently, a waste of the procedure for the accuracy conversion processing is reduced and the processing is speeded up.
申请公布号 JPH03100722(A) 申请公布日期 1991.04.25
申请号 JP19890238213 申请日期 1989.09.13
申请人 FUJITSU LTD 发明人 YOSHIDA YUJI
分类号 G06F7/00;G06F7/76 主分类号 G06F7/00
代理机构 代理人
主权项
地址