发明名称 ERROR DETECTION CORRECTING AND CODING DEVICE
摘要 PURPOSE:To speed up processing and to simplify the circuit constitution by repetitively decoding and using a correction flag of an error correction code decoded finally to decide the correction of an error correction circuit. CONSTITUTION:A code string demodulated by a demodulation circuit 40 is stored once in a memory 41. An internal code decoding circuit 42 and an external code decoding circuit 44 repeat the decoding of an internal code and an external code for the plural number of times, and the direction of forming decoded error correction codes and the direction of the correlation used at DPCM (compression coding) are made coincident in the last decoding. Thus, after the error correction code is decoded, a correction flag representing disabled correction is written in a correction flag.memory 46 as to a code judged to be disabled correction. Whether or not the correction is needed for the output of a DPCM decoding circuit 48 is decoded by referencing the memory 46. Thus, the correction flag corresponds to the corrected code and the correction processing of the code whose error correction is disabled is implemented at high speed with simple circuit constitution.
申请公布号 JPH0392017(A) 申请公布日期 1991.04.17
申请号 JP19890230033 申请日期 1989.09.04
申请人 CANON INC 发明人 KASHIDA MOTOICHI
分类号 H04N19/42;H03M13/00;H03M13/29;H04N7/24;H04N19/00;H04N19/423;H04N19/44;H04N19/593;H04N19/65;H04N19/89;H04N19/895 主分类号 H04N19/42
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