| 摘要 |
<p>PURPOSE:To easily output an address decoding signal to be a timing signal synchronized with an instruction ode, and to contrive the miniaturization of the circuit constitution by providing an output terminal to take out the address decoding signal inputted to a work line directly or through a buffering circuit. CONSTITUTION:From output terminal 10 provided on work line 3 selected by address decoder 2, the address decoding signal inputted to the line is outputted directly or through a buffering circuit 11, and this address decoding signal is used as a required timing signal at the inside of a semiconductor integrated circuit. In such a manner, the provision of the timing decoding circuit is not particularly needed and the address decoding signal to be the timing signal synchronized with the instruction code can be easily taken out, simultaneously the miniaturization of the circuit constitution is contrived.</p> |
