| 摘要 |
<p>PURPOSE:To control packet processing of a binary signal and its output processing in response to an inputted signal by providing an N-bit composing means outputting an input signal as an N-bit parallel data, a signal monitor means and a control means. CONSTITUTION:An input signal 100 is written in each 1-bit memory 10 in an N-bit composing circuit 1 by a timing signal 112, data D0-DN-1 are read simultaneously to compose an N-bit parallel data. Then the parallel data is outputted to an N-bit data bus 300 and a signal monitor circuit 2 via a gate circuit 14 by a control signal 104. The circuit 2 detects a changes in a signal from a sample of the parallel data and outputs a detection signal corresponding to the change to the bus 300. Then the control circuit 3 stops the packet processing of the input signal and its output at a data change obtained via the bus 300 from the circuits 1, 2 while no change in the input signal is decided and applies the packet processing and its output when the input signal has a change. Thus, efficient packet processing is attained.</p> |
