| 摘要 |
PURPOSE:To attain high circuit integration and low power consumption by using a memory cell of single end constitution, selecting the cell with X and Y system address selection lines, receiving an output signal of a sense amplifier to apply rewrite. CONSTITUTION:When a decoder DCR decodes a fetched address signal and e.g., a word line W0 and a Y selection line Y0 are brought into the selecting state, only one memory cell MC provided at a cross point is selected and input output terminals of a latch circuit are coupled with a data line D0. A readout signal from the selected MC is sent to an N-channel MOSFET Q16 of a sense amplifier through a common data line CD and a rewrite circuit comprising inverter circuits N6 - N8 and a MOSEFT Q22 receives an output signal of the sense amplifier to apply rewrite to the MC through the data line D0. Since only one data line is used to the MC, high circuit integration is attained and only the MC receiving write/readout actually connects to the data line, the power consumption is reduced. |
