发明名称 SINGLE CHIP MICROCOMPUTER
摘要 <p>PURPOSE:To simplify a program and to increase the response speed of an interruption by controlling a multiplex interruption to another interruption under a vector interruption process based on the grant/inhibit information prepared to other interruptions set previously on a vector table. CONSTITUTION:An interruption controller 7 is provided together with a decoder 12 which latches and decodes a part of the vector table contents outputted from a ROM 2 at occurrence of a vector interruption, and the AND gates 8 - 11 which input the outputs of the interruption request flags 13 - 16, the interruption grant flags 17 - 20, and the decoder 12 respectively. Then the head address of an interruption process program is stored in a vector table together with the interruption control information used when another interruption occurs during an interruption process of a certain interruption. The grant or the inhibition is controlled to each interruption based on the interruption control information. As a result, the response speed is increased for the interruption process and the individual control of programs is simplified.</p>
申请公布号 JPH0353336(A) 申请公布日期 1991.03.07
申请号 JP19890189429 申请日期 1989.07.21
申请人 NEC CORP 发明人 YOSHIZAWA KAZUTOSHI
分类号 G06F9/48;G06F9/46;G06F15/78 主分类号 G06F9/48
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