| 摘要 |
PURPOSE:To rapidly execute the addition/subtraction of floating point by correcting an exponent following one-digit normalization based upon a normalizing circuit and then selecting the corrected exponent by a select signal formed by a normalized shift number forming circuit. CONSTITUTION:Since an exponent following one-digit normalization based upon the normalizing circuit 14 is corrected by a constant '1' adder 10 and a constant '1' subtractor 11, and then the corrected exponent is selected by a select signal formed by the normalized shift number forming circuit 16, the arithmetic delay of an exponent correcting adder can be deleted. Thereby, the arithmetic delay of a bus for finding out the final result of an exponential part entered from the circuit 16 after a mantissa part adder 12 into a result register 15 through a normalization ended exponent selector 13 is made almost equal to that of a bus for finding out the final result of a mantissa part entered from the circuit 16 to the result register 15 through the circuit 14. Consequently, floating point subtraction can be accelerated. |
