| 摘要 |
<p>A thermal print head (20) includes a plurality, e.g., three delay shift registers (31,32,33) operating by a clock-controlled shift scan to receive dot print signals (D) from a dot print signal generating circuit (10). The delay registers (31,32,33) have a number of addresses corresponding to the number of dot print elements (21) in the printer head (20). The dot print signals (D) from the delay shift registers (31,32,33) are applied to an OR gate (34) connected to shift registers (24) for the dot print elements (21). With this construction, the shift scan cycle it is set so that t </= T/(n + 1), where T is the least print cycle under normal printing conditions and n is the number of delay shift registers (31,32,33). The real time signals are obtained by sampling an analogue wave as a digitized value and counting the number of clock pulse needed to equal this digitized value, at which time a signal is given.</p> |
