发明名称 FAULT DETECTING SYSTEM FOR CIRCUIT INCLUDING REGISTER FILE
摘要 PURPOSE:To improve the resolution of a faulty range by judging the state of a read flag circuit concerning error, and identifying whether the error is generated by reading or reading/writing. CONSTITUTION:The identification for the write/read of data to plural words in a register file part 200 is executed by plural read flag circuits 210-213. A parity check circuit 240 detects the error of the data read from the file part 200. When the error is detected in the read data, the states of the circuits 210-213 are identified and the fault range of the circuit is selected. Thus, since the state of the read flag circuit is judged and it is identified whether the error is generated by reading or reading/writing when the error is detected in the read data, the fault range of the circuit including the register file can be specified.
申请公布号 JPH0336634(A) 申请公布日期 1991.02.18
申请号 JP19890169800 申请日期 1989.07.03
申请人 NEC CORP 发明人 KANEDA MASAYUKI
分类号 G06F11/00 主分类号 G06F11/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利