| 摘要 |
PURPOSE: To connect to all defined common conductive regions by providing a first conductive sheet connected to adjacent n-type cells below a first region and p-type cells below a second region through first conductive pins, and likewise, providing second, third and fourth conductive sheets. CONSTITUTION: Diffused regions 11 are arranged alternately with substrate exposed regions 12 in a checker board pattern. The pattern pitch may be e.g. several tens microns. A first interconnection level is disposed on a semiconductor substrate and composed of a first insulation layer 20, a lower conductive sheet 30, a second insulation sheet 40 and an upper conductive sheet 50. A second circuit net of a considerably higher pitch than the cell pitch on the substrate 10 is formed with conductive regions conducting to alternately adjacent underlying p- and n-cells. There regions correspond to the base and the emitter of a transistor. The second circuit net pitch ranges from several fractions of mm to several mm. This net may be a band circuit net or checker board circuit net. |
