发明名称 NOISE ELIMINATION CIRCUIT
摘要 PURPOSE:To reduce noise of a signal with one terminal per one signal by providing a signal processing circuit comparing a potential of an input terminal with 1st and 2nd threshold levels and outputting a potential in response to the level or change and providing a resistor between an output of the circuit and the input terminal. CONSTITUTION:A low level is outputted from an output terminal 14 of a signal processing circuit 13 when a potential of an input terminal 12 is lower than a 1st threshold level V1, and a high level is outputted when the level of the input terminal 12 is higher than a 2nd threshold level V2 (V1<V2). When the potential of the output terminal 14 is at a low level and the potential of the input terminal 12 changes from a potential lower than the level V1 to a potential higher than the level V1, the potential of the output terminal 14 changes to a high level. When the potential of the output terminal 14 is at a high level, the circuit is operated conversely and the potential of the output terminal 14 changes to a low level. Thus, the noise component of the input signal is reduced and when a noise elimination circuit is integrated, the noise component is reduced with one terminal per one signal.
申请公布号 JPH0316420(A) 申请公布日期 1991.01.24
申请号 JP19890151868 申请日期 1989.06.14
申请人 MATSUSHITA ELECTRON CORP 发明人 KATABE YUTAKA
分类号 H03K5/1252;H03K5/01 主分类号 H03K5/1252
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