发明名称 |
Binary coded decimal circuit displaying up to 81 - uses only two full full adder circuits, three half adders and common gate circuit |
摘要 |
A BCD circuit comprises half addres, full adders (3), or-gats, and -gates and NAND-gates. The main circuit uses only two dual full adders. Pref., in the input region, a three-part decade circuit provides a direct output to the number 10; another circuit converts the numbers 2 and 8 to number 10 and a further circuit converts numbers 4 and 6 to number 10. Dual 8421 code converting circuit for dual counts. USE/ADVANTAGE - Fewer components.
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申请公布号 |
DE3920897(A1) |
申请公布日期 |
1991.01.17 |
申请号 |
DE19893920897 |
申请日期 |
1989.06.26 |
申请人 |
MERKLE, PAUL, 7032 SINDELFINGEN, DE |
发明人 |
MERKLE, PAUL, 7032 SINDELFINGEN, DE |
分类号 |
H03M7/12 |
主分类号 |
H03M7/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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