| 摘要 |
Cryptography system. This invention consists of a cryptography system under the DES (Data Encryption Standard) algorithm, oriented to Minis and Mainframes, the Hardware of which, which supports the system, is based on an 80386 processor with 20 Mhz bus and 512 K of high-speed memory, connecting to the aforementioned high- speed bus the following peripherals, first of all a controller, a switching controller and Timers, an armoured module which contains the hardware to implement the algorithm, the same consisting of a chip capable of encoding at a speed of 1 Mbps and a storage support of up to 64 keys in a volatile memory. <IMAGE>
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