发明名称 |
Asymmetrical delay for controlling word line selection |
摘要 |
Asymmetrical delay circuitry comprising a chain of inverters connected to logic gates is disclosed which can be implemented at the word line driver or in the address decode circuitry of a memory.
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申请公布号 |
US4985865(A) |
申请公布日期 |
1991.01.15 |
申请号 |
US19880288505 |
申请日期 |
1988.12.21 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
HOUSTON, THEODORE W. |
分类号 |
G11C11/413;G11C8/08;G11C8/10;G11C8/18;G11C11/407 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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