| 摘要 |
PURPOSE:To suppress the jitter of a clock signal by detecting frequency difference between first and second clocks, defining the difference as phase velocity information, accumulating these information for each fixed time in correspondence to a reference clock and generating phase information to define 2pi as a rule. CONSTITUTION:A phase velocity generator 3 is provided to generate the prescribed phase velocity information corresponding to the frequency difference between the first and second clocks and an accumulator 5 is provided to accumulate the phase velocity for each fixed time in correspondence to the reference clock, which is independent of the first and second clocks, and to generate the phase information to define the 2pi as the rule. Accordingly, the frequency of an output clock is automatically followed up so as to be coincident with the frequency of an input clock and even when the output of the phase velocity generator is fluctuated, it is possible to reduce jitter quantity to be generated by increasing the address space of a ROM 6. Thus, the jitter of the clock signal enough is suppressed. |
