发明名称 Small, fast, look-aside data cache memory.
摘要 <p>A computing system includes a processor (101), a system memory (104) containing data utilized by the processor (101) and two cache memories. Each cache memory is connected directly to the processor (101). A first cache memory (103) is connected to the processor (101) and to the system memory (104). The first cache memory (103) contains a subset of data in the system memory (104). A second cache memory (102) is also connected to the processor (101). The second cache memory (102) contains a subset of data in the first cache memory (103). Data integrity in the system memory (104) is maintained using the first cache memory (103) only. Whenever the processor (101) writes data, the processor (101) writes data both to the first cache memory (103) and to the second cache memory (102). Whenever the processor (101) reads data, the processor (101) attempts to read data from the second cache memory (102). If there is a miss at the second cache memory (102), the processor (101) attempts to read data from the first cache memory (103). If there is a miss at the first cache memory (103), the data is retrieved from the system memory (104) and placed in the first cache memory (103). The processor (101) then reads the data from the first cache memory (103). Generally, when the processor (101) reads data from the first cache memory (103), the read data is written into the second cache memory (102). &lt;IMAGE&gt;</p>
申请公布号 EP0407053(A2) 申请公布日期 1991.01.09
申请号 EP19900306663 申请日期 1990.06.19
申请人 HEWLETT-PACKARD COMPANY 发明人 LA FETRA, ROSS V.;SHELTON, JOHN F.
分类号 G06F12/08 主分类号 G06F12/08
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