发明名称 |
FAULT TOLERANT LOGICAL CIRCUITRY |
摘要 |
FAULT TOLERANT LOGICAL CIRCUITRY A fault tolerant logic circuit capable of absorbing many D.C. and A.C. defects. The logic circuit employs a number of redundant logic gate circuits. The gate circuits are arranged in at least first and second interconnected signal paths. The logic gate circuits have two independent outputs. The two independent outputs are each connected to an input in a discrete one of the first and second interconnected signal paths. |
申请公布号 |
CA1278349(C) |
申请公布日期 |
1990.12.27 |
申请号 |
CA19880561205 |
申请日期 |
1988.03.11 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
MALEY, GERALD A.;MOSLEY, JOSEPH M.;WEITZEL, STEPHEN D. |
分类号 |
H03K19/003;H03K19/00;H03K19/007 |
主分类号 |
H03K19/003 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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