| 摘要 |
A constant-capacitance capacitor is series-connected with a variable-capacitance capacitor whose capacitance varies with the pressure. The other end of the variable-capacitance capacitor is connected to the ground potential terminal of a D.C. power source. The terminal voltage of the variable-capacitance capacitor is compared with a threshold voltage provided by the D.C. power source by means of a comparator. An output voltage of the comparator is stored into a memory in synchronism with a clock pulse signal. An output voltage of the memory is integrated by an integrator. An output voltage of the integrator is supplied to a buffer amplifier for lowering the signal source impedance with respect to the output voltage. An output voltage obtained from the buffer amplifier is fed back to the other end of the constant-capacitance capacitor and at the same time supplied to an output terminal.
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