发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
PURPOSE:To enhance a purity of an output signal of a PLL synthesizer circuit by a method wherein a PLL control part and a voltage control oscillator are installed on a chip substrate so as to be separated in positions which are not faced in parallel and an isolation region is formed around the voltage control oscillator. CONSTITUTION:A PLL synthesizer circuit of a BiCMOS constitution is formed in a rectangular chip 1; a PLL operation part 2 constituted of a CMOS logic circuit is formed in one corner part; a prescaler 3 of an ECL constitution by a bipolar transistor is formed so as to be adjacent to one side of the PLL operation part 2. A phase comparator 4 of a CMOS constitution and a charging pump 5 of a bipolar constitution are formed so as to be adjacent to the other side of the PLL operation part 2. A VCO(voltage control oscillator) 6 of a bipolar constitution is formed in a diagonal position of the PLL operation part 2 inside the chip 1; an LPF(low-pass filter) 7 constituted as an external circuit is connected between the VCO 6 and the charging pump 5. A P-type layer is formed as an isolation region 8 around the VCO 6. |
申请公布号 |
JPH02291161(A) |
申请公布日期 |
1990.11.30 |
申请号 |
JP19890111690 |
申请日期 |
1989.04.28 |
申请人 |
FUJITSU LTD;FUJITSU VLSI LTD |
发明人 |
NONAKA KAZUYUKI;AKIYAMA TAKEHIRO;TAKEGAWA NORISHIGE |
分类号 |
H01L21/76;H01L21/822;H01L27/04;H03L7/08 |
主分类号 |
H01L21/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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