| 摘要 |
PURPOSE:To decrease the degree of circuit integration for the number of processors, by fitching m-column of picture data sequentially in time division mode to an LSI, and performing a local parallel processing in m-row X n-column in m times of cycles. CONSTITUTION:Each PE 20 consists of a data memory 21 storing a picture processing parameter such as a local picture data and sum of product weight and the like and an operating unit 22 in a PE performing the operation of sum of products. A picture data 31 is shifted and inputted to the data memory 21 from the outside of an LSI or an adjacent PE 20, and two data 31 and 33 (e.g., picture data and sum of produce weight parameter) being the objective of operation are outputted to an operation unit 22 in the PE. Moreover, an operation unit 23 performing total sum of the operation output 35 of four PEs 20 is provided and a result 36 is outputted from this operation unit 23. |
