| 摘要 |
<p>PURPOSE:To attain high speed exchange processing by sending continuously a succeeding packet to a packet during the transmission at present when the sum of packets to be sent next does not exceed a prescribed maximum packet length in a same destination as the destination of the packet sent at present. CONSTITUTION:When a destination address is the same as the address of a packet during the transmission at present, a maximum packet length deciding circuit 53 adds the packet to the packet length sent already and a destination deciding circuit 52 decides whether or not the sum exceeds a prescribed packet length by the control of a micro controller 51. When the maximum packet length is not exceeded, a reception packet length counter circuit 54 counts data number transferred to a memory 4 from an MAC(Medium Access Control) control circuit 12 and when the data number is coincident with the data number in the reception frame, a succeeding reception request pointer is set to the end of the packet by the controller 51. Thus, the packets of the same destination are multiplexed and the exchange processing is quickened.</p> |
