发明名称 DIVIDER
摘要 PURPOSE:To allow both of decimal division and integer division to share one division part by switching the bit digits of a dividend respectively in accordance with the decimal division and the integer division. CONSTITUTION:The divider is provided with a selector circuit 11 to be switched to the 1st state or the 2nd state in accordance with a mode. The selector circuit 11 switches a dividend data constituted of 2alpha bits to the 1st state for turning the nXi bits (provided that 0<=i<=alpha-1) of the data to '0' and turning the nXii+d bits (provided that 0<=i<=alpha-1) to a significant state corresponding to a dividend data constituted of alpha bits or the 2nd state for turning the nXi bits (provided that 0<=i<=alpha-1) of the dividend data constituted of 2alpha bits to a significant state corresponding to the dividend data constituted of alpha bits and turning the nXi bits (provided that alpha<=i<=2alpha-1) to '0'. Since both the functions of decimal division and integer division can be displayed by using only one division part 12, the size of the circuit can be reduced.
申请公布号 JPH02266428(A) 申请公布日期 1990.10.31
申请号 JP19890087285 申请日期 1989.04.06
申请人 FUJITSU LTD;FUJITSU VLSI LTD 发明人 YAMAWAKI HIROFUMI
分类号 G06F7/537;G06F7/52;G06F7/535 主分类号 G06F7/537
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