DIGITAL DATA RECEIVER

摘要

PURPOSE: To minimize pulse width distortion(PWD) and to maximize the entire system sensitivity by allowing an adaptive voltage reference circuit to measure an amplitude of an incoming burst data packet and adjusting a logic threshold voltage automatically to a DC center voltage of an input signal in several nano bits after the arrival of the packet. CONSTITUTION: This receiver 500 has two circuit units 501, 502. The 1st circuit unit 501 is a differential input/output trans-impedance amplifier and the 2nd circuit unit 502 is a voltage reference circuit configured to be a peak detector that generates a reference voltage VREF to set a logic threshold voltage for the 1st circuit unit 501. Then the adaptive voltage reference circuit 502 measures a level of input data packet and adjusts the logic threshold voltage automatically to a DC center voltage of the input data packet in several nano bits after the arrival of the packet. Thus, the PWD is minimized and the entire system sensitivity is maximized.