发明名称 TESTING METHOD OF IC
摘要 PURPOSE:To enable a quick parallel test of ICs without being affected by defective ICs by testing only those discriminated as accepted in the memory of the results from a testing circuit to which a plurality of ICs are connected one at a time. CONSTITUTION:A first IC chip 1 alone is connected to a first testing circuit 3 of an IC tester to test for a short-circuit trouble and the results thereof are stored into a register 9 of the circuit 3. Then, likewise, the second IC chip 2 is connected to a second testing circuit 4 separately to test for a short-circuit trouble and the results thereof are stored into a register 9 of the circuit 4. After the completion of the testing for all of the IC chips, only those 1, 2... discriminated as accepted are separately connected to circuits 3, 4... provided with a common substrate power source 10 to perform a DC parametric test, a functional test, an AC test and the like simultaneously in parallel. This eliminates the effect of defective IC chips removing them beforehand thereby enabling a quick parallel testing of IC chips.
申请公布号 JPS587573(A) 申请公布日期 1983.01.17
申请号 JP19810105385 申请日期 1981.07.06
申请人 NIPPON DENKI KK 发明人 NIGORIKAWA ATSUSHI
分类号 G01R31/26;G01R31/316;H01L21/66 主分类号 G01R31/26
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