JUSHINDEETASEIGYOYOJOHOHATSUSEISOCHI

摘要

PURPOSE:To simplify the information generator and to attain reception processing of plural reception data strings by unifying a circuit controlling an address of a storage circuit in which reception data control information of plural reception data strings is stored. CONSTITUTION:A TDMA frame synchronizing signal 102 synchronize a frame count circuit 1 and an address count circuit 2. An output value 106 of the circuit 2 reads the content of each storage circuit corresponding to the designated address of a line plan storage circuit 5 and a reception data position information storage circuit 3. The content of the circuit 5 represents reception data control information corresponding to each reception data string and identification of the control information and the content of the circuit 3 represents at which time region in the TDMA frame the control information is to be generated. A comparator circuit 4 outputs a coincidence signal 105 when an output value 103 of the circuit 1 is coincident with an output value 104 of the circuit 3, the output value 106 is counted by the signal 105 to [1] and the said [1] becomes an address 1 of the circuits 5, 3.