发明名称 VALIDITY CHECKING ARRANGEMENT FOR EXTENDED MEMORY MAPPING OF EXTERNAL DEVICES
摘要 <p>A VALIDITY CHECKING ARRANGEMENT FOR EXTENDED MEMORY MAPPING OF EXTERNAL DEVICES In a telecommunications switching system, a CPU utilizes memory mapped access to a number of duplex external devices and other memories. A validity checking arrangement provides for detecting invalid external device unit numbers for memory mapped accesses by the CPU. In addition, this validity checking arrangement will determine that the CPU's operating software has attempted a memory mapped access with an invalid unit number or that a true hardware fault exists.</p>
申请公布号 CA1217846(A) 申请公布日期 1987.02.07
申请号 CA19840455928 申请日期 1984.06.05
申请人 GTE COMMUNICATION SYSTEMS CORPORATION 发明人 LADEWSKI, CHESTER T., JR.;CHAPMAN, HARRY A.;JOHNSTON, JEFFREY J.
分类号 G06F11/00;H04Q3/545;(IPC1-7):H04Q3/54 主分类号 G06F11/00
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