发明名称 |
FET TTL interface circuit |
摘要 |
The circuit has a FET input stage and two bipolar transistors in push-pull circuit, one of which transistors has a device for preventing a state of too much saturation. In the FET TTL interface circuit according to the invention, this device for preventing a state of too much saturation is formed by a clamp FET which is connected to the collector of the relevant bipolar transistor and is effectively connected at the gate to the input of the interface circuit.
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申请公布号 |
DE3909282(A1) |
申请公布日期 |
1990.10.11 |
申请号 |
DE19893909282 |
申请日期 |
1989.03.21 |
申请人 |
FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG EV, 8000 MUENCHEN, DE |
发明人 |
SCHARDEIN, WERNER, DIPL.-PHYS. DR., 4200 OBERHAUSEN, DE |
分类号 |
H03K19/013;H03K19/0175;H03K19/0944 |
主分类号 |
H03K19/013 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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