发明名称 SIGNAL PROCESSOR
摘要 PURPOSE:To execute not only an addition/subtraction but taking out of data whose number is large or small among two pieces of data by means of one instruction by installing selection circuits selecting two inputs for an adder/ subtractor and one of the calculation results of the adder/subtractor and inputting it in a register and their control circuits. CONSTITUTION:Data A and data B inputted to the adder-subtractor 1 are calculated in accordance with the control of a control circuit a3, and the calculation result C is outputted. The selection circuit a5 is controlled by the highest-order bit of the calculation result C, and the selection circuit b6 by a control circuit c7. When the control circuit a3 calculates (data A) minus (data B) in the adder- subtractor 1, data whose number is large between data A and data B is inputted to the register 2, and data whose number is small between data A and data B when the control circuit calculates (data B) minus (data A). Thus, not only the addition/subtraction instruction but an instruction for taking out data whose number is large or small between two pieces of data can be executed at a high speed by one instruction.
申请公布号 JPH02249025(A) 申请公布日期 1990.10.04
申请号 JP19890070807 申请日期 1989.03.23
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SAKIYAMA SHIRO;ARAKI TOSHIYUKI;KITAO YOSHITAKA;MARUYAMA MASAKATSU;AONO KUNITOSHI;NAKAHIRA HIROYUKI
分类号 G06F7/02;G06F7/00;G06F17/10 主分类号 G06F7/02
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