| 摘要 |
PURPOSE:To prevent the generation of a reading out error of data even if a region width is narrow by maintaining the synchronization state up to then without switching an object to be synchronized in the light splice region in a sector. CONSTITUTION:A phase comparator circuit 2 selects a clock Sr for excitation as the object to be synchronized when the switching signal S10 from a control circuit 1 is at a '1' level. The circuit selects reading out data S12 when the signal is at a '0' level. The clock means in the control circuit 1 operates to sustain the S10 at the '0' level and there is no signal input of the object to be synchronized to the circuit 2 so that the previous synchronization state is maintained when the control signal Sp from a host device changes from the '0' level to the '1' level at about the start of the light splice region in the sector. The synchronization is smoothed in this way and the generation of the reading out error is prevented even if the region width is narrow and the period for holding the level of the control signal is short. |
