发明名称 PARALLEL PROCESSOR
摘要 PURPOSE:To attain the parallel processing of an optional processing program by connecting plural unit processors to a host processor through a switch whose connecting state can be varied and switching the switch in accordance with a processing program. CONSTITUTION:Each of the unit processors 9 has a function for starting a checking program at the time of loading down the program and sending the started result to a connected serial link 8. An I/O processor 5 successively switches the connection of a channel Ch30 or Ch31 to another channel to receive the data. Thereby, the processor 5 can know which number of the serial link of the processors 9 and which channel of the switch 10 are connected to each other and sends the information to the host processor 2. If stepped processors are not connected to the processor 5 like channels Ch28, Ch29 e.g., no connection of the processor 9 is certified by receiving a down-load error and the information is transferred to the processor 2.
申请公布号 JPH02247769(A) 申请公布日期 1990.10.03
申请号 JP19890067544 申请日期 1989.03.22
申请人 GRAPHICS COMMUN TECHNOL:KK 发明人 ICHIKAWA MASAHIRO;SHOMURA KAZUYOSHI
分类号 G06F15/16;G06F15/17;G06F15/173;G06F15/177;G06F15/80 主分类号 G06F15/16
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