| 摘要 |
A digital data processor of the type having a plurality of data inputs and a plurality of data latches, each coupled to one of said data inputs is modified to accomodate pattern driven interrupt. A plurality of bit comparators, each having inputs coupled to one of the said data inputs and one of said data latches, compare the input pattern to a stored pattern. The outputs of the bit comparators are ANDed to indicate one of a match and a mis-match between the two patterns. Interrupt generation logic is selectable to generate an interrupt request on one of the match and mis-match indications. The apparatus and method are particularly suited to use in a microcontroller which requires fast and software-efficient pattern driven interrupt.
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