Digital memory delay line for a video border generator

摘要

A digital memory delay line for a video border generator digitizes an insert video key signal and stores the digitized key signal in a digital memory. The locations in the memory are addressed sequentially in a continuous cycle so that as each location is addressed the portion of the key signal stored there is read out to reconstruct the key signal delayed by the cycle time, and a new portion of the key signal is written in. A clock for an address counter that provides addresses for access to the memory has a frequency that is a function of the number locations in the memory and the desired delay of the key signal. The delayed key signal from the memory is written back into the memory in parallel with the current key signal to provide a second output that is delayed by an additional address sequence cycle. The result is to reproduce the insert video key signal delayed for one horizontal line interval and for two horizontal line intervals. From the delayed key signals and the insert video key signal, a widened key signal is generated that is used by the video border generator to mix an insert video having a desired border effect with a background video.